Paper Title :Development Of Digital Signal Processing Platform For Digital Hearing Aid
Author :Siddharth Raghuvanshi, S. P. Gaikwad
Article Citation :Siddharth Raghuvanshi ,S. P. Gaikwad ,
(2014 ) " Development Of Digital Signal Processing Platform For Digital Hearing Aid " ,
International Journal of Electrical, Electronics and Data Communication (IJEEDC) ,
pp. 70-76,
Volume-2,Issue-3
Abstract : There has been a tremendous growth for the past few years in the field of VLSI and real time signal processing.
Number of signal processing algorithms have been developed which allow the user to process real time signals such as
speech to accomplish the signal with desired quality. Development of CMOS technology provides wide selection of low
power FPGAs to be used in Digital system design. This paper introduces an efficient method to design a Digital
Programmable Hearing Aid system working in association with Analog interface module. Real time signal processing
algorithms such as Feedback and echo cancellation, Adaptive filtering , Dynamic range compression, Digital filter for
decimation along with FFT and IFFT algorithms have been discussed using a 32 bit RISC processor core and hardware
digital signal processing block, both residing in a Xilinx FPGA. Hardware configuration and software implementation are
discussed in detail. Xilinx Spartan3, FPGA is used in system design. Spartan3 board has inbuilt ADC inside the chip so there
is no need to use external CODEC system in design. Finally the challenges and the future work for additional improvement
are discussed.
Type : Research paper
Published : Volume-2,Issue-3
DOIONLINE NO - IJEEDC-IRAJ-DOIONLINE-543
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Copyright: © Institute of Research and Journals
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Published on 2014-03-24 |
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